1. Field of the Invention
This invention relates generally to timing of a received data stream. More particularly, it relates to a data signal timing recovery loop useful for establishing the symbol rate of an arbitrary received data signal using a fixed sampling clock.
2. Background of Related Art
High speed data transmission systems, e.g., modems, operate in general by modulating a high frequency carrier corresponding to a desired channel with a low frequency data signal of fixed baud rate. The modulated data signal is transmitted to a receiver, which demodulates the received high frequency modulated signal to recover the transmitted digital symbols at the far transmitter baud rate.
In such data transmission systems, the baud rate of the transmitting and receiving devices are generally fixed at a discrete level, and generally include a modulator and/or demodulator which operates at a fixed baud rate. Any fine adjustments which might be made in the baud rate of the receiver are typically made in the sampling rate of an analog-to-digital (A/D) converter sampling the incoming analog signal. However, these conventional baud rate adjustments are limited to just a few hundreds or thousands of parts per million of the baud rate, and are not able to adjust through a wide range of baud rates without requiring additional and/or different filtering for each different baud rate. The need for additional and/or different filtering for each received baud rate is cumbersome and expensive to implement. Moreover, different receivers must be developed and manufactured for each expected baud rate.
There is a need for a data signal timing recovery loop operating on fixed clock rate (fs) digital samples of arbitrary baud rate data signals to produce digital samples streams synchronous to the baud rate of the arbitrary baud rate received data signal.